1. Field
Embodiments included herein generally relate to chip packaging. More particular, embodiments relate to positioning multiple ICs relative to one another and/or an underlying substrate in a multi-chip package.
2. Background
Wire bonding is a method of providing interconnections between an integrated circuit (IC) and an underlying substrate (e.g., printed circuit board). Typically, the interconnections are provided between pads on the IC and corresponding pads on the underlying substrate. It is important to accurately position the IC on the underlying substrate such that, for example, interconnections from adjacent pads on the IC and underlying substrate do not cross or short with one another. The proper alignment of the IC on the underlying substrate also impacts IC packaging requirements such as, for example, wire bond angle, wire length, and wireloops.
The above design considerations in IC/substrate alignment are further exacerbated in multi-chip packages. In multi-chip packages, multiple ICs in the package are oftentimes required to maintain proper alignment between one another as well as the underlying substrate to avoid issues such as, for example, interconnects crossing or shorting with one another. Inaccurate positioning of at least one IC in the multi-chip package can result in an inoperable and/or unreliable packaged IC chip.